(1) Field
The present invention relates to novel and inventive method, apparatus, and system to implement adaptive digital spectral compensation and calibration of analog components and transceiver chains.
(2) General Background
Potential tradeoffs between cost and performance are often made during the design and manufacturing of digital communications transceivers. Cost can be identified in financial terms, such as the cost of bill of materials (BOM) or cost required to assemble, calibrate and test the transceivers. Performance is typically identified through metrics such as sound clarity for voice communication, bit or packet error rate for data communication, etc.
Analog components of a digital communications receiver are significant contributors to the overall cost. Given a particular design, the best performance operation is typically obtained at a given nominal characteristics of system components. However, analog components typically display variations around their nominal characteristics. High performance analog components (e.g., filters with very high selectivity capability, quadrature receivers and transmitters with matching characteristics of the I and Q arms, etc.), and high precision analog components have higher costs. Thus, the utilization of these high performance and high precision analog components can significantly increase the overall cost of a transceiver.
In addition, analog component characteristics tend to vary as a result of temperature fluctuations, and also as the aging process of silicon occurs. These variations and the techniques and processes to compensate against these variations contribute to the cost vs. performance tradeoff.
Techniques or processes are used to trade off cost vs. performance can include:
1. Initial Factory Calibration Against Variations of the Transceiver Components Around Their Nominal Values and Temperature Variations
Variations of analog components are due to manufacturing process variations of each individual component, or due to manufacturing process variations of the whole system from its components. Typical variations or variable characteristics can include:
a. Phase and Amplitude Transfer Characteristics of Filters and other system componentsxe2x80x94Typical system elements that will display such variations from nominal characteristics include receiver and transmitter selectivity and noise reduction filters, anti-aliasing filters (AAF), mismatches between and Q arms of receivers (I-Q imbalance), etc.
b. Linearity Characteristics of System Componentsxe2x80x94Deviation from desired linear characteristics lead to nonlinear characteristics. Examples of components that display such non-linear artifacts include Low Noise Amplifiers (LNA), mixers and power amplifiers (PA).
Calibration processes use a minimal of resources. For example, a calibration process should be completed in a minimum amount of time, and should use simple circuitry. However, many calibration processes have a lengthy completion time and use special control and sensor loops that would increase the cost of manufacturing.
2. Compensation Against Component and System Variations due to Effects of Aging and Temperature During Operation of the Transceiver
During operation of the transceiver in the field, continued compensation against component and system variations against effects of aging and temperature are typically conducted in many communication systems. The measurements of the component characteristics, and compensation of the measured characteristics can be conducted either during the operation of the transceiver or during idle cycles of the transceiver. Typically such measurements require specialized circuitry embedded into the transceiver.
3. System Design Methods That Enable Utilization of Low Cost Analog System Components That Offers Reduced Performance and Low Precision
These techniques include implementing digital (or analog) algorithms or circuit designs to compensate for effects resulting from usage of low cost analog components. In particular, digital calibration and compensation processes can be used to mitigate performance losses resulting from using low cost analog components to provide cost effective solutions.
In sampling and A/D conversion of signals, aliasing due to spectral fold over can be a performance limiter. In order to reduce the effects of aliasing, analog filters preceding the sampling and A/D converter units are used. These limit the bandwidth of the signal and eliminate aliasing or reduce the aliasing to acceptable levels.
However, there are several problems associated with analog anti-aliasing filters. In one exemplary problem, the cost of designing and implementing a circuit using analog anti-aliasing filters can be significantly higher that the cost of designing and implementing circuit using digital filters with selectivity characteristics similar to the analog filters. In another exemplary problem, the filter characteristics designed for certain I and Q paths may not exactly match due to problems associated with embedding to silicon, and may therefore lead to significant performance losses. In an additional exemplary problem, anti-aliasing filters can be typically specified to have sharp transition from pass band to stop band to avoid aliasing. The order of the filter would typically need to be increased to have the required sharp transition. As a result, the design and implementation cost may increase significantly. Thus, it would be desirable to develop processes enabling usage of anti-aliasing filters with relaxed requirements.
Some calibration and compensation processes focus on high performance high precision analog circuit designs. Two such processes can include:
1. Utilizing special electronic circuit configurations to automatically compensate against component variations or reduce system sensitivity against such variations; and
2. Utilizing silicon layout techniques to counteract component variations due to process and die variations (including common centroid layout techniques to counteract variations in the process to produce silicon at the fabrication facility).
However, these aforementioned processes would add to the cost of a device and would occupy additional silicon area.
Furthermore, many transceivers start their operation in the field with a post calibration characteristics arrived after factory calibration. Some semi-advanced transceivers utilize adaptive compensation algorithms that perform compensation of targeted specific components, such as power amplifier, power detectors, etc. However, a comprehensive compensation process that can compensate the overall transmitter and receiver characteristics is desirable.
Prior art factory calibration processes typically address the calibration of individual components that are most likely ones to display significant variations from one sample to another, or of individual components whose slight variations cause significant variations in system performance. Special circuitry are typically embedded into the Device-Under-Test (DUT), and into the test jig. An example of such special circuitry can include a special circuitry to compensate for mismatches of I and Q arms of transmitters and receivers. As the number of individual components that are to be calibrated increases, the total amount of special circuitry embedded into the DUT and into the test jig would significantly increase.
The total time required to calibrate all the components of a system would typically be the sum of the time needed to calibrate each of the components. As the system may include a multitude of components that require calibration, the total time required to calibrate all the components may become a significant overhead in the manufacturing process, and may significantly increase the production cost of the system. Furthermore, there is also a need for overall calibration of the system as well. For each component in a system, there exists a post-calibration tolerance level. That is, the calibration brings the characteristics of the component within a certain tolerance level of the desired characteristics. However, when these components operate within the larger system, the overall characteristics of the larger system may significantly vary from intended desired characteristics. To resolve such problem, each component would need to be calibrated at a higher level of precision. Unfortunately, calibrating each component at a higher level of precision would increase the cost the calibration process and thus the production cost of the system.
Another process involves using digital algorithms to detect and compensate for undesired features of analog components. Such digital algorithms have been used to compensate for imbalances in the I and Q arms of analog quadrature receivers used for down conversion, and for DC offset compensation in direct down conversion receivers. However, using digital algorithms require the design and implementation of such algorithms. In addition, these digital algorithms would consume additional power and would occupy additional valuable physical area on the chip.
Previous efforts to reduce cost of anti-aliasing filters can be based on the following premises:
1. Improvements on Analog IC Design Technology to Provide Cheaper and More Complex Filter Designs
Although there have been improvements in analog IC design technology, these improvements do not match the drastic improvements of speed, power consumption and density of digital IC design technologies.
2. Methods of Analog Circuit Design and Implementation
Unfortunately, even though some methods of analog circuit design and implementation can provide incremental performance improvements of performance, no revolutionary changes have been recorded.
3. Use of Higher Sampling Frequencies
Based on the theory of signal processing, it is possible to use anti-aliasing filters with smoother transition between pass-band and stop-band as the sampling frequency of the signal increases. However, an increase in sampling frequencies would result in an increase in the cost of the circuitry that implements the A/D conversion. Also, power consumption would typically increase along with an increase in sampling frequencies. For example, it is well known that the power consumption of a CMOS ADC would doubles if the sampling frequency doubles.
The drawbacks of the prior compensation and calibration techniques or methods point towards a need to the desirability of a compensation and calibration method, system, and apparatus to reduce the cost of anti-aliasing filters.